has_artvin_li ( TA3TCM )
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PLL Prescaler Selection bits:
PLLDIV = 1
No prescale (4 MHz oscillator input drives PLL directly)
PLLDIV = 2
Divide by 2 (8 MHz oscillator input)
PLLDIV = 3
Divide by 3 (12 MHz oscillator input)
PLLDIV = 4
Divide by 4 (16 MHz oscillator input)
PLLDIV = 5
Divide by 5 (20 MHz oscillator input)
PLLDIV = 6
Divide by 6 (24 MHz oscillator input)
PLLDIV = 10
Divide by 10 (40 MHz oscillator input)
PLLDIV = 12
Divide by 12 (48 MHz oscillator input)
CPU System Clock Postscaler:
CPUDIV = OSC1_PLL2
[OSC1/OSC2 Src: /1][96 MHz PLL Src: /2]
CPUDIV = OSC2_PLL3
[OSC1/OSC2 Src: /2][96 MHz PLL Src: /3]
CPUDIV = OSC3_PLL4
[OSC1/OSC2 Src: /3][96 MHz PLL Src: /4]
CPUDIV = OSC4_PLL6
[OSC1/OSC2 Src: /4][96 MHz PLL Src: /6]
USB Clock Selection bit (used in Full Speed USB mode only; UCFG:FSEN = 1):
USBDIV = 1
USB clock source comes directly from the primary oscillator block with no postscale
USBDIV = 2
USB clock source comes from the 96 MHz PLL divided by 2
Oscillator Selection bits:
FOSC = XT_XT
XT oscillator, XT used by USB
FOSC = XTPLL_XT
XT oscillator, PLL enabled, XT used by USB
FOSC = ECIO_EC
External clock, port function on RA6, EC used by USB
FOSC = EC_EC
External clock, CLKOUT on RA6, EC used by USB
FOSC = ECPLLIO_EC
External clock, PLL enabled, port function on RA6, EC used by USB
FOSC = ECPLL_EC
External clock, PLL enabled, CLKOUT on RA6, EC used by USB
FOSC = INTOSCIO_EC
Internal oscillator, port function on RA6, EC used by USB
FOSC = INTOSC_EC
Internal oscillator, CLKOUT on RA6, EC used by USB
FOSC = INTOSC_XT
Internal oscillator, XT used by USB
FOSC = INTOSC_HS
Internal oscillator, HS used by USB
FOSC = HS
HS oscillator, HS used by USB
FOSC = HSPLL_HS
HS oscillator, PLL enabled, HS used by USB
Fail-Safe Clock Monitor Enable bit:
FCMEN = OFF
Fail-Safe Clock Monitor disabled
FCMEN = ON
Fail-Safe Clock Monitor enabled
Internal/External Oscillator Switchover bit:
IESO = OFF
Oscillator Switchover mode disabled
IESO = ON
Oscillator Switchover mode enabled
Power-up Timer Enable bit:
PWRT = ON
PWRT enabled
PWRT = OFF
PWRT disabled
Brown-out Reset Enable bits:
BOR = OFF
Brown-out Reset disabled in hardware and software
BOR = SOFT
Brown-out Reset enabled and controlled by software (SBOREN is enabled)
BOR = ON_ACTIVE
Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)
BOR = ON
Brown-out Reset enabled in hardware only (SBOREN is disabled)
Brown-out Voltage bits:
BORV = 0
Maximum setting
BORV = 1
BORV = 2
BORV = 3
Minimum setting
USB Voltage Regulator Enable bit:
VREGEN = OFF
USB voltage regulator disabled
VREGEN = ON
USB voltage regulator enabled
Watchdog Timer Enable bit:
WDT = OFF
HW Disabled - SW Controlled
WDT = ON
HW Enabled - SW Disabled
Watchdog Timer Postscale Select bits:
WDTPS = 1
1:1
WDTPS = 2
1:2
WDTPS = 4
1:4
WDTPS = 8
1:8
WDTPS = 16
1:16
WDTPS = 32
1:32
WDTPS = 64
1:64
WDTPS = 128
1:128
WDTPS = 256
1:256
WDTPS = 512
1:512
WDTPS = 1024
1:1024
WDTPS = 2048
1:2048
WDTPS = 4096
1:4096
WDTPS = 8192
1:8192
WDTPS = 16384
1:16384
WDTPS = 32768
1:32768
MCLR Pin Enable bit:
MCLRE = OFF
RE3 input pin enabled; MCLR disabled
MCLRE = ON
MCLR pin enabled; RE3 input pin disabled
Low-Power Timer 1 Oscillator Enable bit:
LPT1OSC = OFF
Timer1 configured for higher power operation
LPT1OSC = ON
Timer1 configured for low-power operation
PORTB A/D Enable bit:
PBADEN = OFF
PORTB<4:0> pins are configured as digital I/O on Reset
PBADEN = ON
PORTB<4:0> pins are configured as analog input channels on Reset
CCP2 MUX bit:
CCP2MX = OFF
CCP2 input/output is multiplexed with RB3
CCP2MX = ON
CCP2 input/output is multiplexed with RC1
Stack Full/Underflow Reset Enable bit:
STVREN = OFF
Stack full/underflow will not cause Reset
STVREN = ON
Stack full/underflow will cause Reset
Single-Supply ICSP Enable bit:
LVP = OFF
Single-Supply ICSP disabled
LVP = ON
Single-Supply ICSP enabled
Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit:
ICPRT = OFF
ICPORT disabled
ICPRT = ON
ICPORT enabled
Extended Instruction Set Enable bit:
XINST = OFF
Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
XINST = ON
Instruction set extension and Indexed Addressing mode enabled
Background Debugger Enable bit:
DEBUG = ON
Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
DEBUG = OFF
Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
Code Protection bit Block 0:
CP0 = ON
Block 0 (000800-001FFFh) code-protected
CP0 = OFF
Block 0 (000800-001FFFh) not code-protected
Code Protection bit Block 1:
CP1 = ON
Block 1 (002000-003FFFh) code-protected
CP1 = OFF
Block 1 (002000-003FFFh) not code-protected
Code Protection bit Block 2:
CP2 = ON
Block 2 (004000-005FFFh) code-protected
CP2 = OFF
Block 2 (004000-005FFFh) not code-protected
Code Protection bit Block 3:
CP3 = ON
Block 3 (006000-007FFFh) code-protected
CP3 = OFF
Block 3 (006000-007FFFh) not code-protected
Boot Block Code Protection bit:
CPB = ON
Boot block (000000-0007FFh) code-protected
CPB = OFF
Boot block (000000-0007FFh) not code-protected
Data EEPROM Code Protection bit:
CPD = ON
Data EEPROM code-protected
CPD = OFF
Data EEPROM not code-protected
Write Protection bit Block 0:
WRT0 = ON
Block 0 (000800-001FFFh) write-protected
WRT0 = OFF
Block 0 (000800-001FFFh) not write-protected
Write Protection bit Block 1:
WRT1 = ON
Block 1 (002000-003FFFh) write-protected
WRT1 = OFF
Block 1 (002000-003FFFh) not write-protected
Write Protection bit Block 2:
WRT2 = ON
Block 2 (004000-005FFFh) write-protected
WRT2 = OFF
Block 2 (004000-005FFFh) not write-protected
Write Protection bit Block 3:
WRT3 = ON
Block 3 (006000-007FFFh) write-protected
WRT3 = OFF
Block 3 (006000-007FFFh) not write-protected
Boot Block Write Protection bit:
WRTB = ON
Boot block (000000-0007FFh) write-protected
WRTB = OFF
Boot block (000000-0007FFh) not write-protected
Configuration Register Write Protection bit:
WRTC = ON
Configuration registers (300000-3000FFh) write-protected
WRTC = OFF
Configuration registers (300000-3000FFh) not write-protected
Data EEPROM Write Protection bit:
WRTD = ON
Data EEPROM write-protected
WRTD = OFF
Data EEPROM not write-protected
Table Read Protection bit Block 0:
EBTR0 = ON
Block 0 (000800-001FFFh) protected from table reads executed in other blocks
EBTR0 = OFF
Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
Table Read Protection bit Block 1:
EBTR1 = ON
Block 1 (002000-003FFFh) protected from table reads executed in other blocks
EBTR1 = OFF
Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
Table Read Protection bit Block 2:
EBTR2 = ON
Block 2 (004000-005FFFh) protected from table reads executed in other blocks
EBTR2 = OFF
Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
Table Read Protection bit Block 3:
EBTR3 = ON
Block 3 (006000-007FFFh) protected from table reads executed in other blocks
EBTR3 = OFF
Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
Boot Block Table Read Protection:
EBTRB = ON
Boot block (000000-0007FFh) protected from table reads executed in other blocks
EBTRB = OFF
Boot block (000000-0007FFh) not protected from table reads executed in other blocks
'* Name : 20074 - PIC18F4455 A/D Test *
'* Author : Jeroen Boere *
'* Notice : Copyright (c) 2007 Jeroen Boere *
'* : All Rights Reserved *
'* Date : 9/05/2007 *
'* Version : 1.0 *
'* Notes : XTAL 20MHZ *
'* : PIC18F4455 *
'****************************************************************
DEVICE 18F4455
@CONFIG_REQ
@__config CONFIG1L, PLLDIV_1_1 & CPUDIV_1_1 & USBDIV_1_1
@__config CONFIG1H, FOSC_HS_1 & FCMEM_OFF_1 & IESO_OFF_1
@__config CONFIG2L, PWRT_ON_2 & BOR_OFF_2 & VREGEN_ON_2
@__config CONFIG2H, WDT_OFF_2 & WDTPS_128_2
@__config CONFIG3H, MCLRE_ON_3 & LPT1OSC_OFF_3 & PBADEN_OFF_3 & CCP2MX_OFF_3
@__config CONFIG4L, STVREN_OFF_4 & LVP_OFF_4 & ICPRT_OFF_4 & XINST_OFF_4 & DEBUG_OFF_4
@__config CONFIG5L, CP0_OFF_5 & CP1_OFF_5 & CP2_OFF_5
@__config CONFIG5H, CPB_OFF_5 & CPB_OFF_5
@__config CONFIG6L, WRT0_OFF_6 & WRT1_OFF_6 & WRT2_OFF_6
@__config CONFIG6H, WRTC_OFF_6 & WRTB_OFF_6 & WRTD_OFF_6
@__config CONFIG7L, EBTR0_OFF_7 & EBTR1_OFF_7 & EBTR2_OFF_7
@__config CONFIG7H, EBTRB_OFF_7
ALL_DIGITAL = false ' We use some analog I/O's
XTAL = 20 ' Used clock frqz = 20MHz
'76543210 ' bit wise output mask
TRISA = %11111111 ' Set the TRISA Bit
PORTA = %00000111 ' Set PORTA I/O config
ADCON1= %00001100
ADIN_RES = 10 ' Use the 10 bit result A/D
ADIN_TAD = FRC ' Use the FRC (clock source)
ADIN_STIME = 50 ' Sample time of 50 ms
DIM var_vol12 AS FLOAT ' Declare variable
DIM var_vol9 AS FLOAT ' Declare variable
DIM var_vol5 AS FLOAT ' Declare variable
DECLARE LCD_INTERFACE = 4 ' 4 bit's interface LCD
DECLARE LCD_ENPIN = PORTD.2 ' LCD Enable pin
DECLARE LCD_RSPIN = PORTD.3 ' LCD RS pin
DECLARE LCD_DTPIN = PORTD.4 ' LCD DT pin
DECLARE LCD_LINES = 4 ' Type LCD scherm
CLS ' Clear the LCD
PRINT AT 1,1, "* VOLTAGE MONITOR *" ' Write static text on display
PRINT AT 2,1, "+12V:" ' Write static text on display
PRINT AT 3,1, "+9V :" ' Write static text on display
PRINT AT 4,1, "+5V :" ' Write static text on display
again: ' Start of loop
PRINT AT 2,7, SDEC2 var_vol12, " V " ' Display the calculated Voltage
PRINT AT 3,8, SDEC2 var_vol9, " V " ' Display the calculated Voltage
PRINT AT 4,8, SDEC2 var_vol5, " V " ' Display the calculated Voltage
var_vol12 = ADIN 0 ' Read the A/D converter AN0
var_vol12 = var_vol12 / 5400 ' Calculate the correct value *note 1
var_vol9 = ADIN 1 ' Read the A/D converter AN1
var_vol9 = var_vol9 / 7222 ' Calculate the correct value *note 2
var_vol5 = ADIN 2 ' Read the A/D converter AN2
var_vol5 = var_vol5 / 13000 ' Calculate the correct value *note 3
DELAYMS 1000 ' Wait 1 second
GOTO again ' Do it all again!
END
******************************************************************************************
@Config_req
@__config config1H, OSC_HS_1 & FCMEN_OFF_1 & IESO_OFF_1
@__config Config2L, BOREN_ON_2 & BORV_46_2 & PWRT_ON_2
@__config Config2H, WDT_OFF_2 & WDTPS_1_2
@__config Config3H, MCLRE_OFF_3 & LPT1OSC_OFF_3& PBADEN_OFF_3
@__config Config4L, XINST_OFF_4 & STVREN_OFF_4 & LVP_OFF_4 & DEBUG_OFF_4
@__config Config5L, CP0_OFF_5 & CP1_OFF_5 & CP2_OFF_5 & CP3_OFF_5
@__config Config5H, CPB_OFF_5 & CPD_OFF_5
@__config Config6L, WRT0_OFF_6 & WRT1_OFF_6 & WRT2_OFF_6 & WRT3_OFF_6
@__config Config6H, WRTB_OFF_6 & WRTC_OFF_6 & WRTD_OFF_6
@__config Config7L, EBTR0_OFF_7 & EBTR1_OFF_7 & EBTR2_OFF_7 & EBTR3_OFF_7
@__config Config7H, EBTRB_OFF_7
Declare WATCHDOG = OFF
'Declare STACK_SIZE = 12
Device 18F2520
XTAL = 20
'Clear
Declare LCD_INTERFACE 4
Declare LCD_DTPIN PORTC.0
Declare LCD_ENPIN PORTB.1
Declare LCD_RSPIN PORTB.2
Declare LCD_LINES 2
Cls
DelayMS 2000
Print "Welcome"
While 0 = 0
Wend
DEVICE 18F2550
@CONFIG_REQ
@__config CONFIG1L, PLLDIV_1_1 & CPUDIV_1_1 & USBDIV_1_1
@__config CONFIG1H, FOSC_HS_1 & FCMEM_OFF_1 & IESO_OFF_1
@__config CONFIG2L, PWRT_ON_2 & BOR_OFF_2 & VREGEN_ON_2
@__config CONFIG2H, WDT_OFF_2 & WDTPS_128_2
@__config CONFIG3H, MCLRE_ON_3 & LPT1OSC_OFF_3 & PBADEN_OFF_3 & CCP2MX_OFF_3
@__config CONFIG4L, STVREN_OFF_4 & LVP_OFF_4 & ICPRT_OFF_4 & XINST_OFF_4 & DEBUG_OFF_4
@__config CONFIG5L, CP0_OFF_5 & CP1_OFF_5 & CP2_OFF_5
@__config CONFIG5H, CPB_OFF_5 & CPB_OFF_5
@__config CONFIG6L, WRT0_OFF_6 & WRT1_OFF_6 & WRT2_OFF_6
@__config CONFIG6H, WRTC_OFF_6 & WRTB_OFF_6 & WRTD_OFF_6
@__config CONFIG7L, EBTR0_OFF_7 & EBTR1_OFF_7 & EBTR2_OFF_7
@__config CONFIG7H, EBTRB_OFF_7
ALL_DIGITAL true
XTAL = 20
'76543210 ' bit wise output mask
SPBRG = %00001111 ' Set baud rate to 19200 (=15 dec)
RCSTA = %10010000 ' Enable serial continuous receive
TXSTA = %00100000 ' Enable transmit asynchronous mode
BAUDCON = %00000000 ' no special features
SYMBOL int_LED = PORTC.1
SYMBOL flash_LED = PORTC.0
DIM Rx_Byte[3] AS BYTE
DIM cmd_str AS STRING * 3
START:
INTCON.7 = 1 ' Enable Global Interrupts
INTCON.6 = 1 ' Enable Peripheral Interrupts
PIE1.5 = 1 ' Enable UART Rx Interrupt
ON_INTERRUPT GOTO INT ' If there is UART activity: goto INT
GOTO MAIN ' Skip the ISR, goto main program
INT: ' Begin of the ISR
HIGH int_LED ' Make Interrupt Bit High
HSERIN[STR Rx_Byte] ' Read RCreg and put into byte array
PIR1.5 = 0 ' Just to be sure: Clear the Interrupt flag
cmd_str[0] = Rx_Byte[0] ' Store first byte in string at pos 0
cmd_str[1] = Rx_Byte[1] '
cmd_str[2] = Rx_Byte[2] '
cmd_str[3] = 0 ' Terminate the string
DELAYMS 100 ' Wait 100 ms (just for fun :) )
IF cmd_str = "LRE" THEN HSEROUT["Live Read OK!"] ' If LRE, output string
IF cmd_str = "MRA" THEN HSEROUT["Memory Read OK!"] ' IF MRA, output string
LOW int_LED ' The end of the ISR, clear INT-LED
GOTO START ' Goto start so ISR will be used again
MAIN: ' main programloop
LOW flash_LED ' flashled is off
DELAYMS 500 ' Wait 500 ms
HIGH flash_LED ' flashled is on
DELAYMS 500 ' Wait 500 ms
GOTO MAIN ' Again, begin the loop
END ' End of program!
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